AMD's Six-Core Istanbul Processor Got Pictured

Two cores against a single Intel core

By on 14 May 2008, 09:44 GMT
AMD's upcoming six-core Istanbul processor, slated to arrive in early 2009 got pictured earlier today. The chip manufacturer plans to switch to the SOI (silicon-on-insulator) 45-nanometer process as of this summer and the first parts to hit the market in the second quarter will be the Deneb-based processors.

Advanced Micro Devices detailed on the fact that the Deneb silicon will be a direct shrink of the Agena micro-architecture. On the server side, the Barcelona silicon will undergo the same 45-nanometer SOI process and will transform into the upcoming Shanghai.

The Istanbul processor is slated for mass-availability sometime in early 2009 and will directly compete with Intel's six-core Dunnington chip. According to the die-shot, the new AMD chip will feature 6 MB of L3 cache shared among all the cores.

Each core, however, will come with 512 KB of L2 cache. It is expected to come with either DDR2 or DDR3 support, depending on the CPU socket. While the backwards-compatible AM2+ chip will feature DDR2 support, the upcoming AM3 version will only work with DDR3.

According to chip architect Hans de Vries, AMD could take advantage of the chip's small core size, as two 45-nanometer cores would only take up 30 square millimeters (the 256 Kb of L1 cache included). This is more than Intel could cram into the Nehalem silicon, given the fact that a single core with its 256 Kb of L1 cache also takes up 30 square millimeters.

De Vries also alleged that the final die size for the Istanbul chip could occupy 300 square millimeters or even less. At the same time, the Dunnington silicon is expected to reach about 700 square millimeters, which means that AMD could compete with two cores against a single Intel core with Simultaneous Multi-Threading technology.

"Istanbul could be at or just below 300 mm2. Istanbul/Sao Paulo should become a mass market 32nm device so it's not a bad idea in terms of risk reduction to develop them as server/workstation chips at 45nm", claimed Hans De Vries.

5 Comments

The six-core chip will be the cornerstone for the upcoming Magny-Cours 12-core behemoth
   The six-core chip will be the cornerstone for the upcoming Magny-Cours 12-core behemoth